Flicker occurrence has been a problem with liquid crystal display devices, generally due to potential changes in pixel potentials caused by a gate-drain parasitic capacitor in a thin film transistor (Thin Film Transistor, hereinafter referred to as TFT), which TFT is provided for each pixel.
FIG. 16 illustrates an equivalent circuit of one pixel in a liquid crystal display device. As illustrated in FIG. 16, a source line 11 is provided for each column so as to be parallel to each other along a column direction (vertical direction), and a gate line 12 is provided for each row so as to be parallel to each other along a row direction (horizontal direction). A TFT 13 and a pixel electrode 14 are disposed associated with an intersection of the source line 11 and the gate line 12, and a source electrode s of the TFT 13 is connected to the source line 11, a gate electrode g of the TFT 13 is connected to the gate line 12, and a drain electrode d of the TFT 13 is connected to the pixel electrode 14. Further, a liquid crystal capacitor Clc is formed between the pixel electrode 14 and a common electrode (counter electrode) 19 in such a manner that a liquid crystal is sandwiched between the pixel electrode 14 and the common electrode 19.
A CS line 15 is provided for each row so as to be disposed parallel to each other along the row direction (horizontal direction), and is disposed so as to be paired with the gate line 12. A storage capacitor Ccs is formed between the CS line 15 and the pixel electrode 14 disposed on its corresponding row.
In the foregoing configuration, structurally, a feed-through capacitor (parasitic capacitor) Cgd is inevitably formed on the TFT 13 between its gate electrode g and drain electrode d; the parasitic capacitor Cgd causes a potential written into the pixel electrode to vary. FIG. 17 is a timing chart illustrating how the potential (pixel potential) of the pixel electrode 14 varies. FIG. 17 illustrates a state of an operation in which the TFT 13 is switched on to supply a data signal potential from the source line 11 to the pixel electrode 14, the TFT 13 is switched off after the data signal potential is supplied, and the supplied data signal potential is held until the TFT 13 is switched on the next time.
A variable potential (feed-through voltage) ΔVpix is represented by the following equation:ΔVpix=Cgd·ΔVg/(Clc+Ccs+Cgd+Csd)  (1)where Vgh is a gate on-state voltage, Vgl is a gate off-state voltage, ΔVg is a difference therebetween (Vgh−Vgl), and Csd is a parasitic capacitor between the source electrode s and the drain electrode d.
One method of reducing the flicker that occurs due to the feed-through voltage ΔVpix is to set (shift) a common electrode potential (counter potential) Vcom in accordance with ΔVpix. FIG. 17 illustrates a state in which the counter potential Vcom is shifted in accordance with ΔVpix. More specifically, the counter potential Vcom is set in view of ΔVpix, so that a potential difference between the pixel potential and the counter potential Vcom in a positive drive becomes equal to a potential difference between the pixel potential and the counter potential Vcom in a negative drive. This counter potential Vcom is called an optimum counter potential Vcom.
As a result, it is possible to carry out display with identical brightness in the positive drive and the negative drive, and thus allows for reducing the flicker.